1. Field of the Invention
The present invention relates to the field of semiconductor processing and fabrication and more particularly to the fields of photolithography, dielectric materials, and integrated circuit packaging materials.
2. Discussion of Related Art
Integrated circuits are formed of many different layers of materials. Each of these different layers is formed by a separate process during the process flow to form the integrated circuits. Employing separate processes to form each of the layers is time consuming and often complicates process flows by requiring different types of process chambers and chemistry. Additionally, the application of multiple film layers may disrupt the layers underneath. Therefore, the formation of each layer requires specific accommodations depending on whether the preexisting layers over which the new layer is to be formed can withstand the subsequent process conditions. Also, there may be adhesion problems between the layers as well as problems with controlling the thicknesses and uniformity of films. Examples of multiple layer films include the application of a spin-on hard mask over a spin-on inter-layer dielectric that requires discrete spin-on and bake steps for each of the layers. Also, the application of an organic bottom anti-reflective coating (BARC) requires a discrete spin-on and bake step before spinning-on a photoresist layer. Another example is the formation of interference layers by forming two separate layers of material having a different refractive index from one another.
In some cases, the integration of the formation of certain types of films into a process flow may be very difficult or impossible. For example, the integration of a step to form a developer resistant film above a sacrificial light absorbing material (SLAM) is difficult to accomplish as it may require additional tooling, time and complexity to, for example, add a surface cure step or to apply a discrete capping layer. SLAM is used in dual damascene and it has light absorbing properties like an anti-reflective coating (ARC) and has etching properties similar to those of the dielectric layer used in the particular dual damascene structure. In dual damascene, a first etched region (e.g. a via or a trench) within a dielectric material may be filled with SLAM. After the first etched region is filled with the SLAM, a second region is photopatterned and etched (e.g., a trench if the via is already formed or a via if the trench is already formed). It would be valuable to form a developer resistant film above a layer of SLAM because the photoresist developer etches low-k dielectric materials and SLAM. If the SLAM is attacked by the photoresist developer there may be significant undercutting of the SLAM under the photoresist, resulting in excessive etching of the dielectric layer during the dielectric etch due to the undercutting of the SLAM. Another instance where it is difficult to integrate the formation of a film into a process sequence is the formation of a protective layer over the top of a buffer coating on a package substrate. A protective coating over the top of the buffer coating would be valuable to provide additional chemical resistance to the buffer coating while maintaining valuable mechanical and optical properties.